Photoelectric conversion device, focus detection device, method of controlling these devices, and storage medium

ABSTRACT

An object of this invention is to provide a photoelectric conversion device which can always appropriately perform charge accumulation independently of the luminance levels of objects, can read out an image signal by effectively using the dynamic range, can attain accurate auto-focus, and can realize them at low cost without increasing the circuit scale. In order to achieve this object, a memory is provided for each photoelectric conversion element, and a controller controls charge accumulation of the photoelectric conversion element on the basis of control information read out from the memory.

BACKGROUND OF THE INVENTION

The present invention relates to a photoelectric conversion deviceapplied to photographing equipment such as a still camera, video camera,and the like, various observation apparatuses, and the like, its controlmethod, a focus detection device, and a storage medium whichcomputer-readably stores processing steps of implementing the controlmethod of the photoelectric conversion device and focus detectiondevice.

Conventionally, various types of so-called auto-focus (AF) cameras,which detect the focus state of an object, and automatically focus onthe object by changing the moving distance of the photographing lens incorrespondence with the detected focus state, have been proposed.

Such AF cameras and the like use the method of detecting the focus stateby, e.g., forming an object image on a photoelectric conversion element(to be referred to as a sensor hereinafter) formed by a plurality ofphotoelectric conversion pixels (to be simply referred to as pixelshereinafter), and performing predetermined arithmetic processing for aplurality of pixel signals output from the sensor.

In this method, in order to accurately detect the focus states ofobjects having various luminance levels (e.g., from a high-luminanceobject to low-luminance one), the amplification factor (to be referredto as a gain hereinafter) upon reading signals, and the chargeaccumulation time of the sensor must be appropriately controlled.

This is because if the level of an image signal of an object formed by aplurality of pixel signals (to be referred to as a video signalhereinafter) is too high, it exceeds the dynamic range of a pixel signalthat can be processed by the apparatus, and the video signal becomesdifferent from an actual one, thus impairing precision. By contrast, ifthe level of the video signal is too low, noise components increaserelatively, and may impair precision.

FIG. 8 shows a photoelectric converter 500 which controls the read gainof pixel signals and the charge accumulation time in a sensor 54.

This photoelectric converter 500 comprises a sensor 54 constructed by aplurality of pixels, a peak detection circuit 53 for detecting andoutputting a maximum accumulated charge amount during chargeaccumulation on the sensor 54, a memory 52 for receiving and holdingpixel signals upon completion of charge accumulation on the sensor 54, acounter 55, a level output circuit 56 for outputting a level valueselected from a plurality of level values in accordance with the countvalue of the counter 55, a comparator 57 for comparing the outputs fromthe level output circuit 56 and peak detection circuit 53, andoutputting the comparison result, and a read amplifier 58 for outputtingthe pixel signals held in the memory 52 with the gain corresponding tothe count value of the counter 55.

Note that the respective units of the photoelectric converter 500 arecontrolled by a controller 51, which especially controls chargeaccumulation on the sensor 54.

More specifically, as shown in FIG. 9, the controller 51 outputs a resetsignal rst to the sensor 54 and counter 55 (step S501).

In response to this signal, charges on all the pixels of the sensor 54are initialized, and the counter 55 is reset to an initial value “0”(count=0).

After that, charge accumulation on the sensor 54 is actually started.

Subsequently, the controller 51 sets its internal timer at an initialvalue “0” (timer=0), thus starting time measurement of the chargeaccumulation (step S502).

The controller 51 checks if the timer value timer of the internal timerhas exceeded a maximum accumulation time Etime (step S503).

If “timer≧Etime”, the controller 51 determines the end of chargeaccumulation, and outputs a signal trans indicating this to the sensor54. In response to this signal, charges accumulated on the individualpixels of the sensor 54 are transferred as pixel signals to the memory52, thus ending charge accumulation on the sensor 54 (step S508).

On the other hand, if “timer<Etime” in step S503, the controller 51checks if an output signal comp from the comparator 57 is “1”, i.e., ifan output signal c_level of the level output circuit 56 is larger thanan output signal p_out of the peak detection circuit 53 (step S504).

If “comp≠1”, the flow returns to step S503 to repeat the subsequentprocessing steps.

Note that the output signal c_level of the level output circuit 56 willbe described in detail later.

If “comp=1” in step S504, the controller 51 checks if the internal timervalue timer has exceeded an intermediate accumulation time Htime (stepS505).

As a result of checking, if “timer≧Htime”, the flow advances to stepS508, thus ending charge accumulation on the sensor 54.

However, if “timer<Htime” in step S505, the controller 51 checks if thecount value count of the counter 55 is “3” (step S506).

If “count=3”, the flow advances to step S508, thus ending chargeaccumulation on the sensor 54.

On the other hand, if “count≠3” in step S506, the controller 51 outputsa signal up_c to the counter 55. In response to this signal, the countvalue count of the counter 55 is counted up (step S507).

After that, the flow returns to step S503 to repeat the subsequentprocessing steps.

Charge accumulation control of the sensor 54 is done in this way, andthe read of pixel signals held in the memory 52 after completion ofcharge accumulation is controlled by a signal shift output from thecontroller 51.

With this control, pixel signals s_out read out from the memory 52 aremultiplied by the gain by the read amplifier 58, and are output from anoutput terminal Vout.

At this time, the read amplifier 58 multiplies the pixel signals s_outfrom the memory 52 by the gain in accordance with the count value countof the counter 55.

The charge accumulation time of the sensor 54 is controlled by switchingthe output signal c_level of the level output circuit 56.

The charge accumulation time and the output signal c_level of the leveloutput circuit 56 will be described below with reference to FIGS. 10Aand 10B.

In the following description, assume that the level output circuit 56has four level values “level1.0” to “level1.3”, and selectively outputsone of these level values in accordance with the count value count ofthe counter 55.

In FIGS. 10A and 10B, the abscissa plots the charge accumulation time,and the ordinate plots the values of the output signal c_level of thelevel output circuit 56 and the output signal p_out of the peakdetection circuit 53.

FIG. 10A shows a case wherein the object is relatively bright, and thepeak output of each pixel signal, i.e., the output signal p_out of thepeak detection circuit 53 rises quickly. FIG. 10B shows, contrary toFIG. 10A, a case wherein the object is relatively dark, and the peakoutput of each pixel signal rises slowly.

(Case of FIG. 10A)

When charge accumulation is started, since the count value count of thecounter 55 is initialized (step S501), the output signal c_level of thelevel output circuit 56 changes to “level1.0”.

When the charge accumulation time (timer value timer of the internaltimer) has reached “A-1”, the output signal p_out of the peak detectioncircuit 53 exceeds the output signal c_level of the level output circuit56. As a result, when the output signal comp of the comparator becomes“1”, the count value count of the counter 55 is counted up (steps S503to S507). Since the counted-up count value count is supplied to thelevel output circuit 56, the output signal c_level of the level outputcircuit 56 changes to “level1.1”.

Similarly, when the charge accumulation time has reached “A-2”, thecount value count of the counter 55 is counted up, and the output signalc_level of the level output circuit 56 changes to “level1.2”.

Also, when the charge accumulation time has reached “A-3”, the countvalue count of the counter 55 is counted up, and the output signalc_level of the level output circuit 56 changes to “level1.3”.

When the charge accumulation time has reached “A-4”, since the countvalue count of the counter 55 is “3”, charge accumulation on the sensor54 ends (the flow advances to step S508 as a result of checking in stepS506).

(Case of FIG. 10B)

When the charge accumulation time has reached “B-1” and “B-2”, the countvalue count of the counter 55 is counted up, and the output signalc_level of the level output circuit 56 changes from “level1.0” to“level1.1” and from “level1.1” to “level1.2”, in the same manner as in“A-1” to “A-3” mentioned above.

When the charge accumulation time has reached “B-3”, if it has exceededthe intermediate accumulation time due to the slowly rising outputsignal p_out of the peak detection circuit 53, charge accumulation onthe sensor 54 ends (the flow advances to step S508 as a result ofchecking in step S506).

In this way, by switching the output signal c_level of the level outputcircuit 56 among four levels, the charge accumulation time is controlledin correspondence with the object condition, e.g., so that asufficiently long charge accumulation time is assured when the object islight, or the charge accumulation time is prevented from becomingexcessively long when the object is dark.

The gain of the read amplifier 58 is controlled in accordance with thecount value count of the counter 55, and as a consequence, since thegain of the read amplifier 58 is controlled in accordance with the peakoutput (p_out) of each pixel signal, pixel signals can always be readout while effectively using the dynamic range of pixel signals that canbe processed by the apparatus.

However, when the aforementioned conventional photoelectric converter500 is applied to a multi-point AF camera which can effect the AFfunction at a plurality of distance measurement points, the arrangementincluding the comparator 57 and the like shown in FIG. 8 must beprovided for each of all the distance measurement points. As a result,the circuit scale becomes huge, and the area of an IC chip increases.

In order to solve such problem, a method of dividing a single sensorinto regions in units of distance measurement points, and controllingthe charge accumulation time by a single controller while sequentiallyscanning the respective regions is proposed.

With this method, multi-point AF can be realized by a reasonable chipsize while suppressing an increase in IC chip area.

However, in this method, when a pixel signal is read out from eachregion and is then compared to control the charge accumulation time ofthe region (sensor) of each distance measurement point, it isintermittently checked for a certain region during charge accumulationif charge accumulation is to end.

When such method is used in the photoelectric converter 500 shown inFIG. 8, since the output signal c_level of the level output circuit 56is “level1.0” immediately after the beginning of charge accumulation,the count value count of the counter 55 becomes “3” for a high-luminanceobject which makes the output signal p_out of the peak detection circuit53 rise rapidly, and charge accumulation ends. For this reason, muchtime is required, and the charge accumulation time cannot beappropriately controlled. As a result, since the level of the videosignal of an object exceeds the dynamic range, the obtained image may bedistorted. Also, in recent AF cameras, since the number of points fordetecting the focus state (to be referred to as distance measurementpoints hereinafter) in the frame gradually is increasing like 3, 4, 5, .. . , the photographer need not change framing upon photographing afterhe or she sets a principal object in the frame at each distancemeasurement point and then focuses on the principal object, thusimproving operability.

In order to further improve operability, the number of distancemeasurement points is preferably increased.

On the other hand, the focus state at each distance measurement point isdetected by forming an object image on a photoelectric conversion device(to be referred to as a sensor hereinafter) formed by a plurality ofpixels, and arithmetically processing pixel signals output from thesensor. In such case, more accurate focus detection can be attained withincreasing level of an image signal defined by the pixel signals.However, when the level of the image signal is too high and exceeds thedynamic range that can process pixel signals, the image signal becomesdifferent from an actual one, thus impairing precision.

Hence, it is a common practice to use an accumulation sensor, and toappropriately control its accumulation time.

When there are a plurality of distance measurement points, theaccumulation time of a region corresponding to each distance measurementpoint is independently controlled. A circuit for appropriatelycontrolling the accumulation time has a large scale, and when the numberof distance measurement points is increased, the circuit scale of thesensor including a control circuit is huge. To prevent such problem, thepresent applicant has proposed a method of controlling the accumulationtime using a single controller while dividing a photoelectric conversionelement into regions in units of distance measurement points, andsequentially scanning the regions.

However, with this method, since scanning is done all the time duringaccumulation, many noise components are produced, thus impairingprecision. Also, the consumption currents increase, thus wasting energy.

This problem can be solved by slow scanning. However, upon focusdetection for a high-luminance object image, the image signal may exceedthe dynamic range while scanning in units of regions, and precision maybe impaired. Hence, it is hard to attain a small circuit scale andaccurate focus detection at the same time.

SUMMARY OF THE INVENTION

The present invention has been made in consideration of theabove-mentioned problems, and has as its object to provide aphotoelectric conversion device which can always perform chargeaccumulation control independently of the object types to read pixelsignals by effectively using the dynamic range, can attain accurateauto-focus, and can realize them without increasing the circuit scaleand cost, its control method, a focus detection device, and a storagemedium which computer-readably stores processing steps of implementingthe control method of the photoelectric conversion device.

It is another object of the present invention to provide a low-cost,precise photoelectric conversion device and focus detection device,their control method, and a storage medium.

In order to solve the above-mentioned problems and to achieve theobjects, the first aspect of a photoelectric conversion device accordingto the present invention is characterized by the following arrangement.

That is, photoelectric conversion device comprising:

photoelectric conversion means including a photoelectric conversionelement constructed by a plurality of pixels on a semiconductorsubstrate; and storage means for storing predetermined controlinformation arranged on the same semiconductor substrate.

The second aspect of a photoelectric conversion device according to thepresent invention is characterized by the following arrangement.

That is, a photoelectric conversion device comprises photoelectricconversion means including a photoelectric conversion elementconstructed by a plurality of pixels, and storage means for storingpredetermined control information, read means for amplifying anaccumulated charge signal of the photoelectric conversion element with apredetermined amplification factor, and reading out the amplifiedsignal, and control means for controlling the amplification factor ofthe read means on the basis of the control information stored in thestorage means.

The first aspect of a method of controlling a photoelectric conversiondevice according to the present invention is characterized by thefollowing arrangement.

That is, a method of controlling charge accumulation of a photoelectricconversion element constructed by a plurality of pixels, comprises thecontrol step of reading out control information from a memorycorresponding to the photoelectric conversion element, and controllingthe charge accumulation of the photoelectric conversion element on thebasis of the control information.

The second aspect of a method of controlling a photoelectric conversiondevice according to the present invention is characterized by thefollowing arrangement.

That is, a method of controlling operation for reading out anaccumulated charge signal from a photoelectric conversion elementconstructed by a plurality of pixels while applying the signal with apredetermined amplification factor, comprises the control step ofreading out control information from a memory corresponding to thephotoelectric conversion element, and controlling the amplificationfactor on the basis of the control information.

The third aspect of a photoelectric conversion device according to thepresent invention is characterized by the following arrangement.

That is, a photoelectric conversion device comprises a plurality ofphotoelectric conversion elements, which are divided into a plurality ofregions, accumulation start means for making the photoelectricconversion elements in the plurality of regions start accumulation,monitoring means for monitoring and outputting accumulation states ofthe photoelectric conversion elements in the respective regions in turn,determination means for comparing each of the monitor outputs output inturn with a predetermined value to determine if the accumulation of thephotoelectric conversion element in the region corresponding to themonitor output is to end, and accumulation end means for, when thedetermination means determines that the accumulation is to end, endingthe accumulation of the photoelectric conversion element in the regioncorresponding to the monitor output, and the monitoring means monitorsand outputs the accumulation states in the respective regions at apredetermined time interval in turn, and makes the predetermined timeinterval different between a timing immediately after the beginning ofthe accumulation and a timing a certain period of time after thebeginning of the accumulation.

The first aspect of a focus detection device according to the presentinvention is characterized by the following arrangement.

That is, a photoelectric conversion device comprises a plurality ofphotoelectric conversion elements, which are divided into a plurality ofregions, accumulation start means for making the photoelectricconversion elements in the plurality of regions start accumulation,monitoring means for monitoring and outputting accumulation states ofthe photoelectric conversion elements in the respective regions in turn,determination means for comparing each of the monitor outputs output inturn with a predetermined value to determine if the accumulation of thephotoelectric conversion element in the region corresponding to themonitor output is to end, accumulation end means for, when thedetermination means determines that the accumulation is to end, endingthe accumulation of the photoelectric conversion element in the regioncorresponding to the monitor output, pixel read means for reading outpixels of the respective divided regions, and detection means forperforming focus detection of an object by calculating pixel signalsread out by the pixel read means, and the monitoring means monitors andoutputs the accumulation states in the respective regions at apredetermined time interval in turn, and makes the predetermined timeinterval different between a timing immediately after the beginning ofthe accumulation and a timing a certain period of time after thebeginning of the accumulation.

The third aspect of a method of controlling a photoelectric conversiondevice according to the present invention is characterized by thefollowing arrangement.

That is, in a method of controlling a photoelectric conversion devicewhich comprises a plurality of photoelectric conversion elements, whichare divided into a plurality of regions, accumulation start means formaking the photoelectric conversion elements in the plurality of regionsstart accumulation, monitoring means for monitoring and outputtingaccumulation states of the photoelectric conversion elements in therespective regions in turn, determination means for comparing each ofthe monitor outputs output in turn with a predetermined value todetermine if the accumulation of the photoelectric conversion element inthe region corresponding to the monitor output is to end, andaccumulation end means for, when the determination means determines thatthe accumulation is to end, ending the accumulation of the photoelectricconversion element in the region corresponding to the monitor output,the monitoring means monitors and outputs the accumulation states in therespective regions at a predetermined time interval in turn, and makesthe predetermined time interval different between a timing immediatelyafter the beginning of the accumulation and a timing a certain period oftime after the beginning of the accumulation.

The first aspect of a method of controlling a focus detection deviceaccording to the present invention is characterized by the followingarrangement.

That is, in a method of controlling a focus detection device whichcomprises a plurality of photoelectric conversion elements, which aredivided into a plurality of regions, accumulation start means for makingthe photoelectric conversion elements in the plurality of regions startaccumulation, monitoring means for monitoring and outputtingaccumulation states of the photoelectric conversion elements in therespective regions in turn, determination means for comparing each ofthe monitor outputs output in turn with a predetermined value todetermine if the accumulation of the photoelectric conversion element inthe region corresponding to the monitor output is to end, accumulationend means for, when the determination means determines that theaccumulation is to end, ending the accumulation of the photoelectricconversion element in the region corresponding to the monitor output,pixel read means for reading out pixels of the respective dividedregions, and detection means for performing focus detection of an objectby calculating pixel signals read out by the pixel read means, themonitoring means monitors and outputs the accumulation states in therespective regions at a predetermined time interval in turn, and makesthe predetermined time interval different between a timing immediatelyafter the beginning of the accumulation and a timing a certain period oftime after the beginning of the accumulation.

The first aspect of a storage medium according to the present inventionis characterized by the following arrangement.

That is, a storage medium stores a control program for controlling aphotoelectric conversion device which comprises a plurality ofphotoelectric conversion elements, which are divided into a plurality ofregions, accumulation start means for making the photoelectricconversion elements in the plurality of regions start accumulation,monitoring means for monitoring and outputting accumulation states ofthe photoelectric conversion elements in the respective regions in turn,determination means for comparing each of the monitor outputs output inturn with a predetermined value to determine if the accumulation of thephotoelectric conversion element in the region corresponding to themonitor output is to end, and accumulation end means for, when thedetermination means determines that the accumulation is to end, endingthe accumulation of the photoelectric conversion element in the regioncorresponding to the monitor output, and the control program has a codeof the step of controlling the monitoring means to monitor and outputthe accumulation states in the respective regions at a predeterminedtime interval in turn, and to make the predetermined time intervaldifferent between a timing immediately after the beginning of theaccumulation and a timing a certain period of time after the beginningof the accumulation.

The second aspect of a storage medium according to the present inventionis characterized by the following arrangement.

That is, a storage medium stores a control program for controlling afocus detection device which comprises a plurality of photoelectricconversion elements, which are divided into a plurality of regions,accumulation start means for making the photoelectric conversionelements in the plurality of regions start accumulation, monitoringmeans for monitoring and outputting accumulation states of thephotoelectric conversion elements in the respective regions in turn,determination means for comparing each of the monitor outputs output inturn with a predetermined value to determine if the accumulation of thephotoelectric conversion element in the region corresponding to themonitor output is to end, accumulation end means for, when thedetermination means determines that the accumulation is to end, endingthe accumulation of the photoelectric conversion element in the regioncorresponding to the monitor output, pixel read means for reading outpixels of the respective divided regions, and detection means forperforming focus detection of an object by calculating pixel signalsread out by the pixel read means, and the control program has a code ofthe step of controlling the monitoring means to monitor and output theaccumulation states in the respective regions at a predetermined timeinterval in turn, and to make the predetermined time interval differentbetween a timing immediately after the beginning of the accumulation anda timing a certain period of time after the beginning of theaccumulation.

Other objects and advantages besides those discussed above shall beapparent to those skilled in the art from the description of a preferredembodiment of the invention which follows. In the description, referenceis made to accompanying drawings, which form a part hereof, and whichillustrate an example of the invention. Such example, however, is notexhaustive of the various embodiments of the invention, and thereforereference is made to the claims which follow the description fordetermining the scope of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the arrangement of a photoelectricconversion device to which a photoelectric conversion device of thepresent invention in the first embodiment;

FIG. 2 is a block diagram showing the arrangement of a level outputcircuit of the photoelectric conversion device;

FIG. 3 is a flow chart for explaining a charge accumulation controlprogram (main processing) executed by a controller of the photoelectricconversion device;

FIG. 4 is a flow chart for explaining a reset program in the chargeaccumulation control program;

FIG. 5 is a flow chart for explaining a gain determination program inthe charge accumulation control program;

FIGS. 6A and 6B are graphs for explaining the charge accumulation in thephotoelectric conversion device;

FIG. 7 is a flow chart for explaining a read control program of pixelsignals executed by the controller of the photoelectric conversiondevice in the second embodiment;

FIG. 8 is a block diagram showing the arrangement of a conventionalphotoelectric conversion device;

FIG. 9 is a flow chart for explaining conventional charge accumulationcontrol;

FIGS. 10A and 10B are graphs for explaining the charge accumulation inthe conventional photoelectric conversion device;

FIG. 11 is a view for explaining the principle of a focus detectiondevice;

FIG. 12 is a view for explaining the principle of the focus detectiondevice;

FIGS. 13A to 13C are graphs showing the light amount distributions oflight that becomes incident on two sensors;

FIGS. 14A to 14C are graphs showing the relationship between the dynamicrange of an A/D converter and the image signal;

FIG. 15 is a view showing distance measurement points in a frame;

FIG. 16 is a block diagram showing the electric circuitry of the focusdetection device;

FIG. 17 is a block diagram showing the first embodiment of a controllershown in FIG. 16;

FIG. 18 is a flow chart for explaining the operation of the firstembodiment;

FIG. 19 is a flow chart for explaining the operation of the secondembodiment;

FIG. 20 is a block diagram showing another arrangement of the controllershown in FIG. 16; and

FIG. 21 is a flow chart for explaining the operation of the thirdembodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The preferred embodiments of the present invention will be describedhereinafter with reference to the accompanying drawings.

First Embodiment

A photoelectric conversion device according to the present invention isrealized by, e.g., a photoelectric conversion device 100 shown in FIG.1.

The photoelectric conversion device 100 is capable of multi-point AF,and comprises a controller 1, a plurality of sensor array blocks 2 ₁ to2 _(n), a level output circuit 3, a buffer 4 with a selection signal, acomparator 5, and a read amplifier 6, as shown in FIG. 1.

The plurality of sensor array blocks 2 ₁ to 2 _(n) are set incorrespondence with a plurality of distance measurement points (to bereferred to as regions 1 to n hereinafter), and have the samearrangement.

For example, the sensor array block 2 ₁ corresponding to region 1 ofregions 1 to n comprises analog switches 11 ₁ and 12 ₁, a buffer 13 ₁with a selection signal, a memory 14 ₁, a peak detection circuit 15 ₁, asensor 16 ₁, and a RAM 17 ₁.

The building units of the photoelectric conversion device 100 will beexplained below.

(Controller 1)

The controller 1 corresponds to control means, and performs operationcontrol of the overall device and, especially, charge accumulationcontrol of the sensor array blocks 2 ₁ to 2 _(n).

As will be described in detail later, the controller 1 has a programmemory 18 which pre-stores a processing program for performing variouskinds of control operations, and when the processing program stored inthe program memory 18 is read out and executed by the controller 1, theoperation control of the overall device as well as charge accumulationcontrol is executed.

(Sensor Array Blocks 2 ₁ to 2 _(n))

The sensor array blocks 2 ₁ to 2 _(n) correspond to photoelectricconversion means.

For example, in the sensor array block 2 ₁, the sensor 16 ₁ comprises apair of sensor arrays for phase difference detection, and forms thefirst image by around 30 to 80 pixels, and the second image by the samenumber of pixels.

The peak detection circuit 15 ₁ corresponds to monitor means. Thecircuit 15 ₁ detects the maximum accumulated charge amount (the outputvalue of a pixel that exhibits the highest output) during chargeaccumulation of the sensor 16 ₁, and outputs it to the analog switch 12₁.

At this time, when the analog switch 12 ₁ is ON in response to a signalpsel_1 from the controller 1, an output signal p_out from the peakdetection circuit 15 ₁ is output to one input terminal (“+” terminal) ofthe comparator 5 via the analog switch 12 ₁.

The memory 14 ₁ temporarily holds charges accumulated on the sensor 16 ₁as pixel signals simultaneously with the end of charge accumulation onthe sensor 16 ₁.

At this time, when the analog switch 11 ₁ is ON in response to a signalsel_1 from the controller 1, since a signal shift output from thecontroller 1 is supplied to the memory 14 ₁, pixel signals s_out held onthe memory 14 ₁ are sequentially output to the input terminal of theread amplifier 6 via the analog switch 11 ₁.

The RAM 17 ₁ corresponds to storage means, and serves as a memory forstoring information (control information) associated with chargeaccumulation on the sensor 16 ₁. Upon reception of a signal ltcR_1 fromthe controller 1, the RAM 17 ₁ stores the value of a signal Rin from thelevel output circuit 3 (to be described later). At least the sensorarray blocks 2 ₁ to 2 _(n) and the RAM 17 ₁ to 17 _(n) are arranged onthe same semiconductor substrate.

When the controller 1 supplies a signal rsel_1 to the buffer 13 ₁ with aselection signal, an output signal Ro from the RAM 17 ₁ is output as asignal r_out via the buffer 13 ₁ with a selection signal. The outputsignal r_out is supplied to the read amplifier 6 and level outputcircuit 3. Note that the signal r_out is 2-bit data.

Since the remaining sensor array blocks 2 ₂ to 2 _(n) have the samearrangement as that of the aforementioned sensor array block 2 ₁, adetailed description thereof will be omitted.

(Level Output Circuit 3)

The level output circuit 3 corresponds to selection means ordetermination means, and comprises three resistors r_1, r_2, and r_3,four analog switches 21 to 24, an amplifier 25, a decoder 26, a selector27, and a counter 28, as shown in, e.g., FIG. 2. The selector 7 receivesa signal r_out selectively output from the sensor array blocks 2 ₁ to 2_(n) (e.g., in the sensor array block 2 ₁, the signal r_out output fromthe RAM 17 ₁ via the buffer 13 ₁ with a selection signal), and an outputsignal c_level of the amplifier 25 and an output signal c_out of thecounter 28 determine the outputs from the level output circuit 3. Notethat the output signal c_out is 2-bit data.

In such level output circuit 3, the three resistors r_1, r_2, and r_3are inserted between two reference potentials vref1 and vref2, andvoltage-divide the two reference potentials vref1 and vref2 into fourvoltage values (level values as status information) level1.3, level1.2,level1.1, and level1.0, which are output in correspondence with theanalog switches 21 to 24.

At that time, one of the analog switch 21 to 24 is turned on dependingon the output from the decoder 26, and only the output from the ONanalog switch is output to the input terminal of the amplifier 25. Inthis way, one of the four level values level1.3, level1.2, level1.1, andlevel1.0 is selected, and the selected level value is output as a signalc_level from the amplifier 25.

The decoder 26 selects one of the four analog switches 21 to 24 inaccordance with an output signal sel_out from the selector 27, andoutputs a signal for turning on the selected analog switch. Note thatthe output signal sel_out is 2-bit data.

The selector 27 selects one of an output signal c_out from the counter28 and the signal r_out selectively output from the sensor array blocks2 ₁ to 2 _(n) upon reception of a signal sel_level from the controller1, and outputs the selected signal as the signal sel_out to the decoder26.

The counter 28 initializes its count value to “0” upon reception of asignal rst_level from the controller 1, and increments its count valueupon reception of a signal G_up from the controller 1. The count valueof the counter 28 serves as the signal c_out.

Note that a signal max_level supplied from the controller 1 to thecounter 28 will be explained later.

(Buffer 4 with Selection Signal)

The buffer 4 with a selection signal receives the signal c_out (thecount value of the counter 28) from the level output circuit 3, andoutputs the signal c_out as a signal Rin to be written in the RAMs 17 ₁to 17 _(n) of the sensor array blocks 2 ₁ to 2 _(n) upon reception of asignal W_ram from the controller 1.

(Comparator 5)

The comparator 5 corresponds to comparison means, and receives thesignal c_level (the output from the amplifier 25) from the level outputcircuit 3, and a signal p_out selectively output from the sensor arrayblocks 2 ₁ to 2 _(n) (e.g., in the sensor array block 2 ₁, a signalp_out output from the peak detection circuit 15 ₁ via the analog switch12 ₁). The comparator 5 compares the signals c_level and p_out, andoutputs the comparison result as a signal comp to the controller 1.

Note that the output signal comp from the comparator 5 is set at “1”when the signal p_out is larger than the signal c_level.

The read amplifier 6 corresponds to read means, and receives a signalr_out selectively output from the sensor array blocks 2 ₁ to 2 _(n)(e.g., in the sensor array block 21, a signal r_out output from the RAM17 ₁ via the buffer 13 ₁ with a selection signal), and pixel signalss_out selectively output from the sensor array blocks 2 ₁ to 2 _(n)(e.g., in the sensor array block 2 ₁, pixel signals s_out output fromthe memory 14 ₁ via the analog switch 12 ₁). The read amplifier 6multiplies each pixel signal s_out by a gain according to the signalr_out, and outputs it as a signal Vout.

The respective building units of the photoelectric conversion device 100have been described.

The controller 1 which performs the operation control of the entirephotoelectric conversion device 100, especially, the charge accumulationcontrol of the sensor array blocks 2 ₁ to 2 _(n), will be described indetail below.

Note that a control method according to the present invention isexecuted by the controller 1.

For example, the program memory 18 of the controller 1 stores processingprograms according to the flow charts shown in FIGS. 3 to 5, and whenthese processing programs are read out and executed by the controller 1,the following charge accumulation control is done.

(Main Processing: FIG. 3)

The controller 1 performs the following reset processing first (stepS101).

(Main Processing—Reset Processing: FIG. 4)

The controller 1 outputs a reset signal rst to the sensors 16 ₁ to 16_(n) of the sensor array blocks 2 ₁ to 2 _(n) (step S201).

In response to this signal, charges on the sensors 16 ₁ to 16 _(n) ofthe sensor array blocks 2 ₁ to 2 _(n) are cleared, thus starting actualcharge accumulation.

The controller 1 then sets a register value r_sel of its internalregister (not shown) for sensor array block selection (region selection)at an initial value “1” (step S202).

The controller 1 outputs a signal max_level to the level output circuit3 (step S203).

In response to this signal, the count value (signal c_out) of thecounter 28 in the level output circuit 3 is set at “3”.

The controller 1 outputs a signal W_ram to the buffer with a selectionsignal, and outputs signals ltcR_x (x=1 to n) to the RAM 17 _(x) of thesensor array block 2 _(x) selected according to the register value r_sel(step S204).

Note that the register value r_sel indicates the sensor array block(region) to be selected, and “x=r_sel”.

With this signal, the RAM 17 _(x) in the sensor array block 2 _(x)(x=r_sel=1 to n) corresponding to the register value r_sel stores theoutput signal c_out (count value=“3”) from the level output circuit 3.

The controller 1 checks if the register value r_sel is “n”, i.e., if “3”is written in the RAMs 17 ₁ to 17 _(n) in the sensor array blocks 2 ₁ to2 _(n) corresponding to all the regions 1 to n (step S205).

If the end of write is not determined in step S205, the controller 1increments the register value r_sel (step S206), and the flow returns tostep S204 to repeat the subsequent processes.

In this way, “3” is written in the RAMs 17 ₁ to 17 _(n) in the sensorblocks 2 ₁ to 2 _(n) corresponding to all the regions 1 to n.

After that, the control returns to the main processing shown in FIG. 3(step S207).

(Main Processing: FIG. 3)

Upon completion of the reset processing in step S101, the controller 1then sets its internal timer (not shown) at an initial value “0”(timer=0), thereby starting time measurement of charge accumulation(step S102).

The controller 1 sets the register value r_sel of its internal registerused in the aforementioned reset processing at an initial value “1”(step S103).

The controller 1 then checks if the timer value timer of the internaltimer has exceeded a maximum accumulation time Etime (step S104).

If “timer≧Etime”, the flow advances to step S109 (to be describedlater).

On the other hand, if “timer<Etime” in step S104, the controller 1outputs a signal psel_x to the analog switch 12 _(x) in the sensor arrayblock 2 _(x) selected in accordance with the register value r_sel.

Also, the controller 1 outputs a signal rsel_x to the buffer 13 _(x)with a selection signal of in the sensor array block 2 _(x), and asignal sel_level to the level output circuit 3 (step S105).

In response to these signals, the output signal (maximum accumulatedcharge amount) of the peak detection circuit 15 _(x) in the sensor arrayblock 2 _(x) is output to one input terminal (“+” terminal) of thecomparator 5 as a signal p_out via the analog switch 12 _(x).

The output from the RAM 17 _(x) in the sensor array block 2 _(x) issupplied as a signal r_out to the read amplifier 6 and level outputcircuit 3 via the buffer 13 _(x) with a selection signal. In the leveloutput circuit 3, the selector 27 selects the signal r_out, and thatselected signal is directly supplied to the decoder 26 as a signalsel_out. The decoder 26 selects one of the four level values level1.3,level1.2, level1.1, and level1.0 in accordance with the signal sel_out.The selected level value is output as a signal c_level via the amplifier25.

Subsequently, the controller 1 checks if the output signal comp from thecomparator 5 is “1”, i.e., if the output signal (level value) c_level ofthe level output circuit 3 is larger than the output signal p_out of thepeak detection circuit 15 _(x) in the sensor array block 2 _(x) (stepS106).

If “comp=1”, the flow advances to step S109 (to be described later).

On the other hand, if “comp≠1” in step S106, the controller 1 checks ifthe timer value timer of the internal timer reaches an intermediateaccumulation time Htime (step S107).

If “timer≠Htime”, the flow advances to step S110 (to be describedlater).

Note that “timer=Htime” means that the timer value timer of the internaltimer roughly equals the intermediate accumulation time Htime. The timerequired for completing gain determination (to be described later) forall the regions can be sufficiently determined to be “timer=Htime”.

If “timer=Htime” in step S107, the controller 1 executes the followinggain determination (step S108).

(Main Processing—Gain Determination: FIG. 5)

The controller 1 outputs a signal rst_level to the level output circuit3 (step S301).

In response to this signal, in the level output circuit 3, the countvalue of the counter 28 is cleared to “0”, and its output signalc_out=“0” is output.

The controller 1 checks if the output signal comp of the comparator 5 is“1”, i.e., if the output signal c_level of the level output circuit 3 islarger than the output signal p_out of the peak detection circuit 15_(x) in the sensor array block 2 _(x) (step S302).

As a result of checking, if “comp≠1”, the flow advances to step S305 (tobe described later).

On the other hand, if “comp=1” in step S302, the controller 1 checks ifthe output signal c_out from the level output circuit 3 is “3” (stepS303).

If “c_out=3”, the flow advances to step S305 (to be described later).

If “c_out≠3” in step S303, the controller 1 outputs a signal G_up to thelevel output circuit 3 (step S304).

In response to this signal, in the level output circuit 3, the countvalue (c_out) of the counter 28 is incremented.

After that, the flow returns to step S302 to repeat the subsequentprocesses.

If “comp≠1” in step S302, or if “c_out=3” in step S303, the controller 1outputs a signal W_ram to the buffer 4 with a selection signal, andsignals ltcR_x to the RAM 17 _(x) in the sensor array block 2 _(x) (stepS305).

In response to these signals, the RAM 17 _(x) in the sensor array block2 _(x) stores the output signal c_out of the level output circuit 3.

After this processing, the control returns to the main processing shownin FIG. 3 (step S306).

As described above, in this gain determination, the gain of the readamplifier 6, i.e., the charge accumulation end level (the output signalc_out of the level output circuit 3) is determined on the basis of theoutput signal p_out from the peak detection circuit 15 _(x) in thesensor array block 2 _(x), and the count value (c_out) corresponding tothe determined level is written in the RAM 17 _(x) in the sensor arrayblock 2 _(x).

Since this count value (c_out), i.e., the count value of the counter 28of the level output circuit 3 is counted up one by one from the initialvalue “0”, the output signal c_level of the level output circuit 3gradually increases from “level1.0” to “level1.1”, from “level1.1” to“level1.2”, and so on.

Hence, when “comp=1” is not detected at “level1.0”, since the outputsignal p_out from the peak detection circuit 15 _(x) is lower than“level1.0”, the charge accumulation end level is determined to be“level1.0”, and the count value (c_out=0) corresponding to that level iswritten in the RAM 17 _(x).

After “comp=1” is detected at “level1.0”, when “comp=1” is not detectedat “level1.0”, since the output signal p_out of the peak detectioncircuit 15 _(x) falls within the range between “level1.0”, and“level1.1”, the charge accumulation end level is determined to be“level1.1”, and the count value (c_out=1) corresponding to that level iswritten in the RAM 17 _(x).

Similarly, when the output signal p_out falls within the range between“level1.1” and “level1.2”, “level1.2” is determined. When the outputsignal p_out falls within the range between “level1.2” and “level1.3”,“level1.3” is determined. In each case, the corresponding count value(c_out=2 or 3) is written.

(Main Processing: FIG. 3)

On the other hand, if “timer≧Etime” (the timer value timer of theinternal timer has exceeded the maximum accumulation time Etime) in stepS104, or if “comp=1” (the level value c_level has exceeded the outputsignal p_out of the peak detection circuit 15 _(x) in the sensor arrayblock 2 _(x)) in step S106, the controller determines the end of chargeaccumulation, and outputs a signal trans indicating this to the sensor16 _(x) in the sensor array block 2 _(x) (step S109).

In response to this signal, in the sensor array block 2 _(x)corresponding to the region x, charges accumulated on the respectivepixels of the sensor 16 _(x) are transferred as pixel signals to thememory 14 _(x), thus ending charge accumulation on the sensor 16 _(x).

After the processing in step S109, or after the aforementioned gaindetermination (step S108), or if “timer=Htime” is not detected (thetimer value timer of the internal timer does not exceed the intermediateaccumulation time Htime), the controller 1 checks if the register valuer_sel of the internal register is “n”, i.e., if the processes in stepS104 to S109 are complete for the sensor array blocks 2 ₁ to 2 _(n)corresponding to all the regions 1 to n (step S110).

If “r_sel=n” in step S110, the controller 1 resets the register valuer_sel of the internal register to “1”, to select the sensor array block21 corresponding to the initial region 1, and repeats the processes fromstep S104.

On the other hand, if “r_sel≠n”, the controller 1 increments theregister value r_sel of the internal register to select the next sensorarray block 2 _(x+1) corresponding to the next region (x+1) and repeatsthe processes from step S104.

The charge accumulation control on the sensor array blocks 2 ₁ to 2 _(n)by the controller 1 has been described.

The operations of the sensor array blocks 2 ₁ to 2 _(n) by theaforementioned charge accumulation control will be explained below withreference to FIGS. 6A and 6B.

In FIGS. 6A and 6B, the abscissa plots the charge accumulation time, andthe ordinate plots the output signal c_level of the level output circuit3, and the output signal p_out of the peak detection circuit 15 _(x) inthe sensor array block 2 _(x).

FIG. 6A shows a case wherein the object is relatively bright, and thepeak output of each pixel signal, i.e., the output signal p_out of thepeak detection circuit 15 _(x) of the sensor array block 2 _(x) risesquickly. FIG. 6B shows, contrary to FIG. 6A, a case wherein the objectis relatively dark, and the peak output of each pixel signal risesslowly.

(Case of FIG. 6A)

When charge accumulation is started, since “3” is written in the RAMs 17₁ to 17 _(n) in the sensor array blocks 2 ₁ to 2 _(n) corresponding toall the regions 1 to n, the output signal c_level of the level outputcircuit 3 indicates “level1.3”.

When the output signal p_out from the peak detection circuit 15 _(x) inthe sensor array block 2 _(x) corresponding to a certain region x hasreached this “level1.3” (point P_A), the charge accumulation in thatsensor array block 2 _(x) ends.

Note that the same applies to the sensor array blocks corresponding toother regions.

(Case of FIG. 6B)

When charge accumulation is started, since “3” is written in the RAMs 17₁ to 17 _(n) in the sensor array blocks 2 ₁ to 2 _(n) corresponding toall the regions 1 to n, the output signal c_level of the level outputcircuit 3 indicates “level1.3”.

In this case, since the peak output (p_out) of each pixel signal risesslowly, when the charge accumulation time (the timer value timer of theinternal timer) has reached the intermediate accumulation time Htime(point P_B1), the gain determination (step S108) shown in FIG. 5 isexecuted to determine the charge accumulation end level (c_level) forthe sensor array blocks 2 ₁ to 2 _(n) corresponding to regions 1 to n.

Referring to FIG. 6B, since the output signal p_out from the peakdetection circuit 15 _(x) in the sensor array block 2 _(x) correspondingto a certain region x falls within the range between “level1.1” and“level1.2”, c_level is determined to be “level1.2” for this sensor arrayblock 2 _(x), and this information (“c_out=2” in this case) is writtenin the RAM 17 _(x). When the output signal p_out from the peak detectioncircuit 15 _(x) has reached “level1.2” (point P_B2), the chargeaccumulation in that sensor array block 2 _(x) ends.

Note that the charge accumulation end level is determined in each of thesensor array blocks corresponding to regions other than region x, andthat information is written in the corresponding RAM. When the peakoutput has reached the determined charge accumulation completion level,the charge accumulation in that sensor array block ends.

As described above, according to this embodiment, since informationassociated with charge accumulation (in this case, the value (c_out)corresponding to the charge accumulation end level (c_level)) is writtenin the RAMs 17 ₁ to 17 _(n) in the sensor array blocks 2 ₁ to 2 _(n)corresponding to all the regions 1 to n, charge accumulation control ofthe sensor array blocks 2 ₁ to 2 _(n) corresponding to regions 1 to ncan be independently made.

In addition, since operations such as count-up operation and the likeare not done immediately after the beginning of charge accumulation evenfor a high-luminance object, the image signal of the object can beprevented from exceeding the dynamic range, and the image is neverdistorted.

Hence, an accurate photoelectric conversion device 100 which can alwaysappropriately perform charge accumulation control without increasing thecircuit scale even when the number of distance measurement points ofmulti-point AF is increased, can be provided.

Second Embodiment

In this embodiment, for example, in the photoelectric conversion device100 in the first embodiment described above, read control of pixelsignals in the read amplifier 6 is performed as follows.

The program memory 18 of the controller 1 pre-stores a processingprogram according to the flow chart shown in FIG. 7, and when thisprocessing program is read out and executed by the controller 1, thefollowing read control is done.

The controller 1 selects a region from which pixel signals are to beread (in this case, a region x (x=1 to n), and stores a value (=x)corresponding to the region x in its internal register. The controller 1then outputs a signal sel_x to the analog switch 11 _(x) in the sensorarray block 2 _(x).

In this way, in the sensor array block 2 _(x), pixel signals s_out heldin the memory 14 _(x) are ready to be sequentially output to the inputterminal of the read amplifier 6 via the analog switch 11 _(x).

Also, the controller 1 outputs a signal psel_x to the analog switch 12_(x) in the sensor array block 2 _(x).

In response to this signal, in the sensor array block 2 _(x), the outputsignal p_out from the peak detection circuit 15 _(x) is output to oneinput terminal (“+” terminal) of the comparator 5 via the analog switch12 _(x) (step S401).

The controller 1 then executes the gain determination shown in FIG. 5.

In this fashion, the level (the output signal c_level of the leveloutput circuit 3) is determined on the basis of the output signal p_outfrom the peak detection circuit 15 _(x) in the sensor array block 2_(x), and the count value (c_out) corresponding to the determined levelis written in the RAM 17 _(x) in the sensor array block 2 _(x) (stepS402).

The controller 1 outputs a signal shift to the memory 14 _(x) in thesensor array block 2 _(x).

In response to this signal, the pixel signals s_out held in the memory14 _(x) are sequentially output to the input terminal of the readamplifier 6 via the analog switch 11 _(x).

Also, the controller 1 outputs a signal rsel_x to the buffer 13 _(x) inthe sensor array block 2 _(x).

As a result, the value (c_out) written in the RAM 17 _(x) is read out asa signal Ro, and is output as a signal r_out to the read amplifier 6 viathe buffer 13 _(x) with a selection signal.

Hence, the read amplifier 6 multiplies each pixel signal s_out from thememory 14 _(x) by a gain based on the signal r_out, e.g., a gainselected from a plurality of preset gains in accordance with the signalr_out, and outputs it from the output terminal Vout (step S403).

To restate, according to this embodiment, the gain determination (leveldetermination upon completion of charge accumulation) shown in FIG. 5 isperformed immediately before pixel signals are read out. For thisreason, even when gain determination cannot be done during chargeaccumulation by setting a constant charge accumulation time in, e.g.,moving body predictive AF, that gain determination is done immediatelybefore pixel signals are read out, and the pixel signals are read outwith the gain obtained as the gain determination result. Hence, anaccurate photoelectric conversion device 100 which can alwaysappropriately read out pixel signals can be provided.

Note that the present invention is not limited to the aforementioned AFcamera, but may be applied to various other apparatuses having a focusdetection function.

In the first and second embodiments described above, the output from thepeak detection circuit is used in gain determination. However, thepresent invention is not limited to this. For example, the peak andbottom values may be detected, and a peak-bottom signal obtained bycalculating the difference between the peak and bottom values may beused.

In the second embodiment, the first embodiment may be modified to dogain determination immediately before a read when gain determination isdisturbed for some reasons.

Note that “some reasons” are, for example:

the maximum accumulation time Etime is short;

when gain determination is made using a circuit for outputting apeak-bottom difference in place of the peak detection circuit, operationfor ending accumulation is made since the peak output has exceeded apredetermined level; and so forth.

The sensors 16 ₁ to 16 _(n) in the sensor array blocks 21 to 2 _(n) mayuse any kinds of sensors such as CCDs, CMOS sensors, and the like.

Also, the RAMs 17 ₁ to 17 _(n) in the sensor array blocks 2 ₁ to 2 _(n)may use either digital memories or analog memories.

Third Embodiment

The third embodiment of the present invention will be describedhereinafter. Prior to a description of the third embodiment, theprinciple of a focus detection device will be explained with the aid ofFIGS. 11 to 15.

FIG. 11 shows the cross section of a camera including a focus detectiondevice.

Referring to FIG. 11, reference numeral 701 denotes an objective lensfor focusing light originating from an object to be photographed uponphotographing; 702, a semi-transparent main mirror for reflecting lightrays coming from the objective lens 701; 703, a focus plate placed atthe focal point position of the objective lens 701; 704, a pentagonalprism for changing the light ray direction; 705, an eyepiece for thephotographer; 706, a sub mirror which operates upon focus detection;707, a film such as a silver halide film or the like; and 708, a focusdetection device.

In FIG. 11, light coming from an object (not shown) is transmittedthrough the objective lens 701, and is reflected upward by the mainmirror 702 to form an image on the focus plate 703. The image formed onthe focus plate 703 is visually observed by the photographer or observervia the eyepiece 705 after being reflected several times by thepentagonal prism 704.

On the other hand, some light components of the light beam that hasreached the main mirror 702 are transmitted through the main mirror 702,and are reflected downward by the sub mirror 706 toward the focusdetection device 708.

FIG. 12 is an exploded view of only the objective lens 701 and focusdetection device 708 in FIG. 11 to explain the principle of focusdetection.

In the focus detection device 708 shown in FIG. 12, reference numeral709 denotes a field mask placed near the prospective focal plane of theobjective lens 701, i.e., a plane conjugate with the film surface; 710,a field lens placed near the prospective focal plane; 711, a secondaryimaging system built by two lenses 711-1 and 711-2; 712, a photoelectricconversion element including two sensor arrays 712-1 and 712-2 placedbehind the two lenses 711-1 and 711-2 in correspondence with theselenses; 713, a stop having two apertures 713-1 and 713-2 formed incorrespondence with the two lenses 711-1 and 711-2; and 714, the exitpupil of the objective lens 701, which includes two split zones 714-1and 714-2.

Note that the field lens 710 has an effect of forming an image in thevicinity of the apertures 713-1 and 713-2 of the stop 713 with respectto the zones 714-1 and 714-2 of the exit pupil 714 of the objective lens701, and light beams 715-1 and 715-2 transmitted through the two zones714-1 and 714-2 of the exit pupil 714 form light amount distributions onthe two sensor arrays 712-1 and 712-2, respectively.

The focus detection device shown in FIG. 12 is of so-called phasedifference detection type, and will be described below with reference tothe graphs of the light amount distributions formed on the sensor arrays712-1 and 712-2 in FIGS. 13A to 13C.

In FIG. 13A, reference numeral 801 denotes the ordinate of the graph,which plots the light amount intensity. Reference numeral 802 denotesthe abscissa of the graph, which plots the distributions of pixels onthe sensor arrays 712-1 and 712-2; and 807 and 808, the light intensityoutputs (to be referred to as image signals hereinafter) of the pixels.Reference numerals 803 and 804 denote the distributions of the sensorarrays 712-1 and 712-2, which will be referred to as first and secondimages, respectively, for the sake of simplicity. Reference numerals 805and 806 denote the central portions of the individual sensor arrays.

When the image point of the objective lens 701 agrees with theprospective focal plane, the first and second image outputs nearly matcheach other, as shown in the graph in FIG. 13A.

On the other hand, when the image point of the objective lens 701 islocated in front of the prospective focal plane, i.e., when the imagepoint is located on the objective lens 701 side, light amountdistributions are formed on the two sensor arrays 712-1 and 712-2 closeto each other, as shown in FIG. 13B. By contrast, when the image pointof the objective lens 701 is located behind the prospective focal plane,light amount distributions are formed on the two sensor arrays 712-1 and712-2 separate from each other, as shown in FIG. 13C.

In addition, since the deviation between the light amount distributionsformed on the two sensor arrays 712-1 and 712-2 has a functionalrelationship with the defocus amount, i.e., out-of-focus amount of theobjective lens 701, the out-of-focus direction and amount of theobjective lens 701 can be detected by calculating that deviation usingan appropriate arithmetic means. The position of the lens systemincluding the objective lens 701 and the like is moved in correspondencewith the detected direction and amount to make the deviation nearlyzero, thus ending focus detection.

Normally, an image signal is obtained by analog-to-digital (A/D)converting analog outputs from the sensor, and is subjected to digitalarithmetic processing by an arithmetic unit to perform theaforementioned defocus amount calculations. At this time, to accuratelycalculate the defocus amounts, it is necessary to execute theaccumulation control on the sensor in an appropriate accumulation time,and to read out the analog outputs with an appropriate amplificationfactor (to be referred to as a gain hereinafter).

FIGS. 14A to 14C are graphs for explaining the image signal state thatcan improve precision.

In FIG. 14A, reference numeral 809 denotes the dynamic range of A/Dconversion. When an image signal is read out, as shown in FIG. 14A,since nearly the entire dynamic range of A/D conversion is used,accurate defocus amount calculations can be attained even when noisecomponents are slightly superposed on the image signal.

On the other hand, in FIG. 14B, the image signal exceeds the dynamicrange of A/D conversion due to too long an accumulation time or toolarge a read gain. Hence, a high light-intensity portion of the imagesignal is lost as information used in calculation, and errors may beproduced in the defocus amount calculations. By contrast, in FIG. 14C,the height of the image signal is very low due to too short anaccumulation time or too small a read gain. In this state, the influenceof noise superposed on the image signal cannot be ignored, and errorsmay be produced in the defocus amount calculations again.

Hence, to realize an accurate focus detection device, it is important toappropriately control the accumulation time and read gain.

The principle of the focus detection device has been described.

In a photoelectric conversion device and a focus detection device usingthe device according to the third embodiment of the present invention, aplurality of focus detection devices equivalent to the above-mentionedone are functionally present in a single camera. For example, even when55 distance measurement points 902 are present in a frame 901 of anobject image obtained by looking into the eyepiece 705 by thephotographer (FIG. 15), focus detection can be done in the sameprinciple.

FIG. 16 is a block diagram showing the electric circuit of the focusdetection device 708.

Reference numeral 1001 denotes a controller, which performs accumulationcontrol of a plurality of sensor arrays and read control of an imagesignal. Reference numerals 1002, 1003, and 1004 denote sensor arrayblocks corresponding to regions 1, 2, and n (n is an integer equal to orlarger than 2), which respectively correspond to the distancemeasurement points 902 shown in FIG. 15.

In one sensor array block, a pair of sensor arrays for phase differencedetection construct a sensor, and detect the first image by around 30 to80 pixels, and the second image by the same number of pixels. Also, thesensor array block includes a peak detection circuit for detecting thehighest output value among the pixels during accumulation, and a memoryfor temporarily storing photoelectric conversion outputs accumulated onthe sensor simultaneously with the end of accumulation.

When an analog switch 1012 is ON, the peak detection circuit outputs thehighest output value (p_out) among the pixels to one input terminal of acomparator 1005. The comparator 1005 compares a predetermined voltage VRwith the signal p_out, and outputs a signal comp to the controller 1001.The comp signal=“1” is output when the signal p_out is larger than VR,i.e., when accumulation is to end.

When an analog switch 1011 is ON, the memory sequentially outputs pixeloutputs to the input terminal of a buffer amplifier 1006 in response toa signal shift from the controller 1001. The buffer amplifier 1006outputs pixel signals with an appropriate gain via a terminal Vout.

When the controller 1001 outputs a signal rst (reset signal), charges onthe sensors corresponding to all the regions 1 to n are cleared, thusstarting accumulation control for all the regions. The controlleroutputs psel_1, psel_2, . . . in turn, and after it outputs psel_n forthe n-th region as the last one, the controller 1001 outputs psel_1again. Since the analog switch 1012 is turned on by the output signalpsel_m (m=1 to n), peak signals (p_out) can be obtained in turn fromregions 1 to n. The controller 1001 checks based on the signal comp ifthe peak signal (p_out) from the selected region has exceeded apredetermined level, thus attaining accumulation control, i.e.,determining whether or not accumulation of that region is to continue.

If the signal comp is “1”, the controller 1001 outputs a signal trans_mto stop sensor accumulation for that region, and transfers photoelectricconversion signals of the pixels accumulated on the sensor to thememory. If the signal comp is “0”, the controller 1001 continues sensoraccumulation without transferring signals. Of course, after signals havebeen transferred from a given region, that region is not subjected totransfer before the next accumulation.

After the signals are transferred to the memory, a region can beselected by a signal sel_m, and an image output can be read out inresponse to the signal shift.

First Embodiment

The first embodiment of the controller 1001 in FIG. 16 will be describedin more detail with the aid of FIG. 17.

Reference numeral 1020 denotes a microcomputer (μCOM), which controlsthe entire electric circuit of the focus detection device 708 (see FIG.12). Reference numeral 1021 denotes a clock generator for outputtingclock signals (clk) at predetermined periods. Reference numeral 1022denotes a counter for clearing its count value to zero upon reception ofa reset signal (RST) from the microcomputer 1020, then counting up thesignals clk from the clock generator 1021, and outputting its countvalue (cnt_value).

Reference numeral 1023 denotes an accumulation time memory for storingthe accumulation times of the respective regions. Upon reception of thereset signal (RST) from the microcomputer 1020, all the contents of thememory are cleared to zero. Then, upon reception of a signal trans_mcorresponding to each region from the microcomputer 1020, the memory1023 stores cnt_value at that time in reg_m. In this way, theaccumulation times of all the regions can be individually stored. Thestored accumulation times are used for noise component correction andthe like of an image signal, but since they are not directly related tothe present invention, a detailed description thereof will be omitted.At least the sensor array blocks 1002 etc. and the accumulation timememory 1023 are arranged on the same semiconductor substrate.

Reference numeral 1024 denotes an input terminal of the signal compoutput from the comparator 1005 shown in FIG. 16. As described above,the microcomputer 1020 determines based on the signal comp=“0” or “1” ifit outputs a signal trans_m.

Reference numeral 1025 denotes a signal rst to be output to therespective regions shown in FIG. 16. The signal rst is used for clearingcharges on the sensors in FIG. 16 as well as the counter 1022 andaccumulation time memory 1023 in FIG. 17.

Reference numerals 1026, 1028, and 1030 denote output terminals ofsignals trans_m output from the microcomputer 1020 to the sensors shownin FIG. 16. The signals trans_m are used for transferringphotoelectrically converted charges from the sensors to the memories inFIG. 16 as well as the control of the accumulation time memory in FIG.17.

Reference numerals 1027, 1029, and 1031 denote output terminals ofsignals psel_m output from the microcomputer 1020 to the analog switch1012 shown in FIG. 16. These signals psel_m are used for selecting aregion which supplies its output value to the comparator 1005 in FIG.16.

The operation of the microcomputer 1020 will be described in more detailbelow with reference to the flow chart in FIG. 18.

If the operation is started in step S700, a signal rst is output (stepS701) to clear the counter 1022 and accumulation time memory 1023, andalso clear charges on the sensors for the respective regions, thusstarting accumulation. Then, “0” is input to an internal register sel ofthe μCOM 1020. The register sel selects a region from which an imageoutput is to be read out.

An internal register w_cnt of the μCOM 1020 is cleared to zero (stepS702). The register w_cnt is counted up later and its contents arecompared with a predetermined level to produce a wait time.

A signal clk is then input, and it is checked if the signal clk hasrisen from “0” to “1” (step S703). If YES in step S703, the flowadvances to step S704; otherwise, the control stays step S703.

The count value (cnt_value) of the counter 1022 is input (step S704).

If it is determined in step S705 that the count value is smaller than apredetermined level c1, the flow directly advances to step S706 and thesubsequent steps.

The register w_cnt is cleared to zero (step S706).

In step S707, the value of the register sel is incremented by 1. Thisoperation can execute the accumulation control in turn in units ofregions.

If the value of the register sel is larger than n, i.e., if it hasexceeded the number of regions of the distance measurement points, “1”is input to the register sel to select region 1 again (steps S708 andS709).

If it is determined in step S708 that the value of the register sel isequal to or smaller than n, a signal psel_m is output (step S710). Inresponse to this signal, the accumulation condition of region m, i.e.,the peak value of the photoelectric conversion amounts of the pixels inregion m appears as the output p_out.

If it is determined that region m has sufficiently accumulated charges,since the comparator 1005 outputs a signal comp=“1” (step S711), themicrocomputer 1020 outputs a signal trans_m to transfer charges on therespective pixels in the sensor of region m to the memory, thus endingaccumulation (step S712). After that, the flow returns to step S702. Onthe other hand, if accumulation is insufficient, since a signal comp=“0”is output, the flow directly returns to step S702.

On the other hand, if it is determined in step S705 that the count value(cnt_value) is equal to or larger than c1, the flow advances to stepS713 to check if the value of the register w_cnt equals a predeterminedvalue c2. If YES in step S713, the flow returns to step S706 to repeatthe above-mentioned operations.

On the other hand, if it is determined in step S713 that the value ofthe register w_cnt has not reached c2 yet, the value of the registerw_cnt is incremented by 1 in step S714, and the flow returns to stepS703 to wait for the leading edge of the next signal clk.

In this fashion, in the third embodiment, since the cnt_value is smallfor a while after the beginning of the sensor accumulation, the flowquickly advances from step S705 to step S706 to continuously determinethe accumulation amounts in units of regions 1 to n in turn insynchronism with the leading edge of the signal clk. When the cnt_valuehas exceeded the predetermined value c1 a certain period of time afterthe beginning of sensor accumulation, since determination of theaccumulation amounts in units of regions is stopped unless the countvalue of the register w_cnt reaches the predetermined value c2, thedrive frequency for determining the accumulation amount of the sensorlowers.

With this control, focus detection of a high-luminance object image canbe accurately attained since an image signal can be formed withoutexceeding the dynamic range, and noise components and consumptioncurrents can be minimized since the overall drive frequency lowers. Torestate, according to this embodiment, an accurate, low-costphotoelectric conversion device which is easy to use due to manydistance measurement points, and a focus detection device using thedevice can be realized.

Second Embodiment

In the second embodiment, the flow chart shown in FIG. 19 replaces thatin FIG. 18 in the first embodiment.

The operation of the second embodiment will be described below withreference to FIG. 19.

Steps S800 to S803 are the same as steps S700 to S703.

In step S804, the value of the register sel is incremented by 1 as instep S707.

If the value of the register sel is equal to or smaller than n, the flowadvances to step S810 and the subsequent steps; otherwise, the flowadvances to step S806.

In step S806, the count value (cnt_value) of the counter 1022 is input.

If it is determined in step S807 that the count value is smaller thanthe predetermined level c1, the flow advances to step S808; otherwise,the flow advances to step S813 and the subsequent steps.

In step S808, the register w_cnt is cleared to zero.

In step S809, “1” is input to the register sel to select region 1 again.

Steps S810 to S812 are the same as steps S710 to S712.

If it is determined in step S807 that the count value is equal to orlarger than c1, it is checked if the value of the register w_cnt hasreached the predetermined value c2 (step S813). If YES in step S813, theflow returns to step S808 to repeat the above-mentioned operations.

If it is determined in step S813 that the value of the register w_cnthas not reached c2, the value of the register w_cnt is incremented by 1in step S814, and the flow returns to step S803 to wait for the leadingedge of the next signal clk.

In this way, in the second embodiment, the flow advances from step S807to step S808 since the cnt_value is small for a while after thebeginning of sensor accumulation to select region 1 soon again even whenthe control reaches the last region n, and the accumulation amounts arecontinuously determined in units of regions 1 to n in turn insynchronism with the leading edge of the signal clk. When the cnt_valuehas exceeded the predetermined value c1 a certain period of time afterthe beginning of sensor accumulation, the accumulation amounts of therespective regions are continuously determined from regions 1 to n insynchronism with the leading edge of the signal clk. However, uponcompletion of determination of the accumulation amount of the lastregion n, wait operation is inserted until the register w_cont iscounted up to the predetermined value c2. This also lowers the drivefrequency for determining the accumulation amount.

In the second embodiment, substantially the same effects as in the firstembodiment can be obtained, and an accurate, low-cost photoelectricconversion device which is easy to use due to many distance measurementpoints, and a focus detection device using the device can be realized.

Third Embodiment

In the third embodiment, the detailed block diagram of the controller1001 of the first and second embodiments shown in FIG. 17 is modified asshown in FIG. 20, and the flow chart in FIG. 18 or 19 is modified asshown in FIG. 21.

The differences between FIGS. 20 and 17 will be explained below.Reference numeral 1032 denotes a divider for frequency-dividing a signalclk from the clock generator 1021 and outputting a signal d_out.

Reference numeral 1033 denotes a selector for selecting one of thesignal clk from the clock generator and the signal d_out from thedivider 1032 in accordance with a signal c_sel output from themicrocomputer 1020, and outputting the selected signal as a signalc_clk. When c_sel=0, the signal clk is selected; when c_sel=1, thesignal d_out is selected.

In FIG. 20, the signal c_clk output from the selector 1033 is input tothe microcomputer 1020 and counter 1022 in place of the signal clk inFIG. 17.

The operation of the third embodiment will be described below withreference to the flow chart in FIG. 21.

Steps S900 and S901 are the same as steps S700 and S701.

In step S902, the count value (cnt_value) of the counter 1022 is input.

In steps S903 to S905, if the count value is smaller than thepredetermined level c1, the output c_sel is set at “0”; if the countvalue is equal to or larger than c1, the output c_sel is set at “1”.

The signal clk is then input and it is checked in step S906 if thesignal clk has risen from “0” to “1”. If YES in step S906, the flowadvances to step S907; otherwise, the control stays step S906.

Steps S907 to S912 are the same as steps S707 to S712.

In this manner, in the third embodiment, since cnt_value is small for awhile after the beginning of sensor accumulation, c_sel is set at “0”,and the signal clk is selected as the output signal c_clk from theselector 1033. As a result, since the signal clk is input to both themicrocomputer 1020 and counter 1022, regions for determining theaccumulation amount are sequentially selected in synchronism with thesignals with shorter periods from the clock generator 1021.

By contrast, when cnt_value has exceeded the predetermined value a givenperiod of time after the beginning of accumulation, c_sel is set at “1”,and the signal d_out is selected as the output signal c_clk from thesensor 1033. For this reason, the drive frequency of the accumulationcontrol lowers. At the same time, the counter for the accumulation timecounts up quickly for a while after the beginning of accumulation, butcounting-up slows down soon.

The third embodiment can obtain substantially the same effects as in thefirst and second embodiments, and the flow chart can be simplified, thusreducing the load on software.

Note that the present invention may be applied to modifications orchanges of the aforementioned embodiments without departing from thescope of the invention.

For example, in the above embodiments, the present invention is appliedto a camera. However, the present invention is not limited to the camerabut may be applied to various other apparatuses having a focus detectionfunction. The drive frequency for determination of the accumulationamount is switched at a given timing after an elapse of a certainaccumulation time, but the drive frequency may change continuously andgradually. The above embodiments use the phase difference detectionscheme. However, the present invention is not limited to such specificscheme as long as an image signal is read out and is arithmeticallyprocessed.

Note that the plurality of photoelectric conversion elements correspondto sensors in the sensor array blocks 1002, 1003, and 1004 shown in FIG.16, and the plurality of regions correspond to those of the sensor arrayblocks 1002, 1003, and 1004 shown in FIG. 16 and also to the distancemeasurement points 902 described above with reference to FIG. 15. Theaccumulation control means corresponds to the controller 1001 in FIG. 16and signals psel_m, trans_m, and the like for driving the sensor arrayblocks 1002, 1003, and 1004, and has been explained by the processes insteps S710 to S712 in FIG. 18.

The accumulation start means corresponds to the signal rst in FIG. 16,the process in step S701 in FIG. 18, or the like.

The monitor means corresponds to the signal p_out in FIG. 16, and adetermination means has been explained by the output comp from thecomparator 1005 in FIG. 16, step S711 in FIG. 18, and the like.

The accumulation end means corresponds to signal trans_m in FIG. 16 andstep S712 in FIG. 18.

Making the predetermined time interval immediately after the beginningof accumulation different from that a certain period of time after thebeginning of accumulation has been explained in the flow chart in FIG.18.

The objects of the present invention are also achieved by supplying astorage medium, which records a program code of a software program thatcan realize the functions of the host and terminal of theabove-mentioned first to third embodiments to a system or apparatus, andreading out and executing the program code stored in the storage mediumby a computer (or a CPU or MPU) of the system or apparatus.

In this case, the program code itself read out from the storage mediumrealizes the functions of the above-mentioned embodiments, and thestorage medium which stores the program code constitutes the presentinvention.

As the storage medium for supplying the program code, for example, afloppy disk, hard disk, optical disk, magneto-optical disk, CD-ROM,CD-R, magnetic tape, nonvolatile memory card, ROM, and the like may beused.

The functions of the above-mentioned first and second embodiments may berealized not only by executing the readout program code by the computerbut also by some or all of actual processing operations executed by anOS or the like running on the computer on the basis of an instruction ofthe program code.

Furthermore, the functions of the above-mentioned first and secondembodiments may be realized by some or all of actual processingoperations executed by a CPU or the like arranged in a functionextension board or a function extension unit, which is inserted in orconnected to the computer, after the program code read out from thestorage medium is written in a memory of the extension board or unit.

To recapitulate, according to the present invention, storage means (forexample, a memory which can read and write information) corresponding toa photoelectric conversion element is used, and charge accumulation inthe photoelectric conversion (start and end of charge accumulation, andthe like), and the amplification factor (gain) upon reading out pixelsignals are controlled on the basis of control information read out fromthe storage means. Hence, appropriate charge accumulation can always bedone irrespective of the luminance levels of objects, and pixel signalscan always be read out with an appropriate gain.

Especially, even when the number of distance measurement points is largein, e.g., a multi-point auto-focus camera, appropriate chargeaccumulation can always be done, and pixel signals can always be readout with an appropriate gain. In addition, the pixel signals can be readout by effectively using the dynamic range without impairing it. Hence,a low-cost device which can realize accurate auto-focus withoutincreasing its circuit scale can be provided.

When the photoelectric conversion element and the corresponding storagemeans are integrally formed on a single substrate, control efficiencycan be improved. Even when the number of distance measurement points islarge, a lower-cost device which can improve operability withoutincreasing the circuit scale can be provided. Since the drive frequencyfor accumulation control is switched between the timing immediatelyafter beginning of accumulation and the timing a certain period of timeafter the beginning of accumulation, focus detection of even ahigh-luminance object image can be accurately done since an image signalcan be formed without exceeding the dynamic range. Also, since theoverall drive frequency lowers, noise components and consumptioncurrents can be minimized. Hence, an accurate, low-cost photoelectricconversion device which is easy to use due to many distance measurementpoints, and a focus detection device using the device can be realized.

The present invention is not limited to the above embodiments andvarious changes and modifications can be made within the spirit andscope of the present invention. Therefore, to apprise the public of thescope of the present invention the following claims are made.

1. A photoelectric conversion device comprising: a photoelectricconverter including a plurality of photoelectric conversion elementseach of which is constructed by a plurality of pixels on a semiconductorsubstrate; a plurality of storage elements arranged on the samesemiconductor substrate, each storing predetermined accumulation periodcontrol information employable in controlling a corresponding one ofsaid photoelectric conversion elements, wherein each of said pluralityof storage elements includes rewritable memory of which accumulationperiod control information employable in controlling an accumulationperiod of said photoelectric conversion element is rewritable by apredetermined program stored in a program memory; and a controller,wherein said controller controls charge accumulation period of saidphotoelectric converter on the basis of the accumulation period controlinformation stored in said storage elements.
 2. The device according toclaim 1, wherein said photoelectric converter further includes amonitor, wherein said monitor monitors an accumulated charge state insaid photoelectric conversion element, and said controller includes aselector, wherein said selector selects an arbitrary one of a pluralityof pieces of status information on the basis of the accumulation periodcontrol information stored in said storage elements, and a comparator,wherein said comparator compares an output from said monitor with thestatus information selected by said selector, and controls the chargeaccumulation of said photoelectric converter on the basis of acomparison result of said comparator.
 3. The device according to claim2, wherein said monitor monitors and outputs information based on amaximum accumulated charge amount of said photoelectric conversionelement.
 4. The device according to claim 2, wherein said controllerstores the status information selected by said selector in said storageelements as the accumulation period control information.
 5. The deviceaccording to claim 1, wherein said photoelectric converter isconstructed by forming said photoelectric conversion element and storageelements on a single substrate.
 6. The device according to claim 2,wherein said controller includes a circuit, wherein said circuitdetermines predetermined information on the basis of said output fromsaid monitor, and stores the information determined by said circuit insaid storage elements as the accumulation period control information. 7.A method of controlling charge accumulation of a plurality ofphotoelectric conversion elements each of which is constructed by aplurality of pixels, comprising: reading out respective accumulationperiod control information from a plurality of memories each of which iscorresponding to respective one of said photoelectric conversionelements, and respectively controlling the charge accumulation period ofeach of said photoelectric conversion elements on the basis ofrespective accumulation period control information, wherein chargeaccumulation period of a plurality of photoelectric converters arecontrolled on the basis of accumulation period control information in aplurality of memories; and rewriting respective accumulation periodcontrol information employable in controlling an accumulation period ofsaid photoelectric conversion element in said plurality of memories by aprogram stored in a program memory.
 8. The method according to claim 7,further comprising: monitoring and outputting an accumulated chargestate in said photoelectric conversion element; selecting an arbitraryone of a plurality of pieces of status information on the basis of theaccumulation period control information read out from said memory;comparing the outputted accumulated charge state with the selectedstatus information; and controlling the charge accumulation of saidphotoelectric conversion element on the basis of a comparison result ofsaid comparing.
 9. The method according to claim 8, further comprisingmonitoring and outputting information based on a maximum accumulatedcharge amount of said photoelectric conversion element.
 10. The methodaccording to claim 8, further comprising storing the selected statusinformation in said memory as the accumulation period controlinformation.
 11. The method according to claim 7, further comprisingdetermining predetermined information on the basis of an accumulatedcharge signal read out from said photoelectric conversion element, andstoring the determined information in said memory as the accumulationperiod control information.
 12. A focus detection device including aphotoelectric conversion device of claim
 1. 13. A storage medium whichcomputer-readably stores program code corresponding to a control methodof claim 7.